Toshiba TR PMIU, User Manual, Page: 62 / 182

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3 3 3 3. . . .3 3 3 3 L L L Ladder logic adder logic adder logic adder logic
3 3 3 3. . . .3 3 3 3. . . .1 1 1 1 Overview
PMIU unit can execute ladder logic.
Ladder circuit is described in the Ladder
logic block (ladder block).
There are 4 kinds of ladder block. All
ladder blocks exist in one of these 4
folders. When you click “Logic Blocks”
folder, list of the screen that exists in
current project is displayed in the
workspace area.
There are 6 folders in “Logic Blocks” folder.
Each folder has corresponding ladder block. Program
capacity of each ladder logic block has no limitation.
Total capacity for ladder blocks is 48KB, 8192 steps. You
can refer current ladder capacity in Application Memory
Status (refer 3.2.5).
Maximum number of block is 256, block number need not
be consecutive.
You can compile project while editing, for checking syntax error of ladder. Click button of Global tool bar
or press F9 key of your PC, then project is compiled. If there is an error, error message is displayed under
workspace area.
When you right click on each folder, following menus are displayed.
New Logic Block Create new ladder logic block in clicked folder.
Ladder logic
block
List of blocks