97
8-9-1. Status register (STB
、
SRE)
bit
Data
Item
Description
Initial STB
value
Initial SRE
value
7
128
0
Unused.
0
0
6
64
SRQ
RQS
MSS
Service request
Message summary
0
0
5
32
ESB
Standard event summary
0
0
4
16
MAV
Output message available
0
0
3
8
0
Unused.
0
0
2
4
0
Unused.
0
0
1
2
LERR
Local bus error
0
0
0
1
TMO
Local bus
Time out
0
0
Each bit is masked when
“0” is set in it. (It is the default setting.)
Masking is canceled when
“1” is set. Set “0” in the unused bits.
Item
Description
SRQ
RQS
MSS
MSS is set to 1 when AND of the bits of the status byte, excluding this
bit (bit 6), and the service request enable register is 1. RQS is set to
1 when MSS changes from 0 into 1. It is cleared when MSS is
cleared or serial polling is executed.
ESB
Indicates that an event occurs in the standard event status register.
MAV
Indicates that there is a message in the output queue.
＊
SRE?
Sets or inquires about the service request enable register.
Setting command
＊
SRE<value>
The <value> range is from 0 to 255.
Application example
＊
SRE48
MAV and ESB are enabled since the value is
48 (
00110000 in binary).
Query command
＊
SRE?
Response example
48
Masking set with this command remains valid
until the setting is changed or power is turned
off. All bits are masked (0) when power is
turned on, regardless of the previous setting.
＊
STB
？
Reads out the status byte and MSS.
Setting command
None.
Query only.
Query command
＊
STB?
Response example
32
The bits set with the *SRE command are only
returned in decimal. The status byte register
is not cleared even if an inquiry is made using
this command.
