MS51
Dec. 17, 2019
Page
313
of 316
Rev 1.01
M
S51
SE
RIES
TE
CHNICA
L REF
ERE
N
CE MA
NU
A
L
Instruction
OPCODE
Bytes
Clock Cycles
MS51 V.S. Tradition 80C51
Speed Ratio
RLC
A
33
1
1
12
RR
A
03
1
1
12
RRC
A
13
1
1
12
SWAP A
C4
1
1
12
MOV
A, Rn
E8~EF
1
1
12
MOV
A, direct
E5
2
3
4
MOV
A, @Ri
E6, E7
1
4
3
MOV
A, #data
74
2
2
6
MOV
Rn, A
F8~FF
1
1
12
MOV
Rn, direct
A8~AF
2
4
6
MOV
Rn, #data
78~7F
2
2
6
MOV
direct, A
F5
2
2
6
MOV
direct, Rn
88~8F
2
3
8
MOV
direct, direct
85
3
4
6
MOV
direct, @Ri
86, 87
2
5
4.8
MOV
direct, #data
75
3
3
8
MOV
@Ri, A
F6, F7
1
3
4
MOV
@Ri, direct
A6, A7
2
4
6
MOV
@Ri, #data
76, 77
2
3
6
MOV
DPTR, #data16
90
3
3
8
MOVC A, @A+DPTR
93
1
4
6
MOVC A, @A+PC
83
1
4
6
MOVX A, @Ri[1]
E2, E3
1
5
4.8
MOVX A, @DPTR[1]
E0
1
4
6
MOVX @Ri, A[1]
F2, F3
1
6
4
MOVX @DPTR, A[1]
F0
1
5
4.8
PUSH direct
C0
2
4
6
POP
direct
D0
2
3
8
XCH
A, Rn
C8~CF
1
2
6
XCH
A, direct
C5
2
3
4
XCH
A, @Ri
C6, C7
1
4
3
XCHD A, @Ri
D6, D7
1
5
2.4
CLR
C
C3
1
1
12
CLR
bit
C2
2
4
3
SETB C
D3
1
1
12
SETB bit
D2
2
4
3
CPL
C
B3
1
1
12
CPL
bit
B2
2
4
3
ANL
C, bit
82
2
3
8
ANL
C, /bit
B0
2
3
8
ORL
C, bit
72
2
3
8
ORL
C, /bit
A0
2
3
8
MOV
C, bit
A2
2
3
4
MOV
bit, C
92
2
4
6
ACALL addr11
11, 31, 51, 71, 91, B1,
D1, F1[2]
2
4
6
LCALL addr16
12
3
4
6
RET
22
1
5
4.8