MS51
Dec. 17, 2019
Page
296
of 316
Rev 1.01
M
S51
SE
RIES
TE
CHNICA
L REF
ERE
N
CE MA
NU
A
L
Regiser
Address
Reset Value
PNP
D6H, all pages
0000_0000b
7
6
5
4
3
2
1
0
-
-
PNP5
PNP4
PNP3
PNP2
PNP1
PNP0
-
-
R/W
R/W
R/W
R/W
R/W
R/W
Bit
Name
Description
5:0
PNPn
PWMn negative polarity output enable
0 = PWMn signal outputs directly on PWMn pin.
1 = PWMn signal outputs inversely on PWMn pin.
PWMINTC
– PWM Interrupt Control
Regiser
Address
Reset Value
PWMINTC
B7H, Page 1
0000_0000 b
7
6
5
4
3
2
1
0
-
-
INTTYP1
INTTYP0
-
INTSEL2
INTSEL1
INTSEL0
-
-
R/W
R/W
-
R/W
R/W
R/W
Bit
Name
Description
5:4
INTTYP[1:0]
PWM interrupt type select
These bit select PWM interrupt type.
00 = Falling edge on PWMn channel 0/1/2/3/4/5 pin.
01 = Rising edge on PWMn channel 0/1/2/3/4/5 pin.
10 = Central point of a PWM period.
11 = End point of a PWM period.
Note that the central point interrupt or the end point interrupt is only available while PWM
operates in center-aligned type.
2:0
INTSEL[2:0]
PWM interrupt pair select
These bits select which PWM channel asserts PWM interrupt when PWM interrupt type is
selected as falling or rising edge on PWM0 channel 0~5 pin..
000 = PWMn channel 0.
001 = PWMn channel1.
010 = PWMn channel2.
011 = PWMn channel3.
100 = PWMn channel4.
101 = PWMn channel5.
Others = PWMn channel 0.
