MS51
Dec. 17, 2019
Page
142
of 316
Rev 1.01
M
S51
SE
RIES
TE
CHNICA
L REF
ERE
N
CE MA
NU
A
L
SPDR
– Serial Peripheral Data Register
Regiser
Address
Reset Value
SPDR
F5H, all page
0000_0000b
7
6
5
4
3
2
1
0
SPDR[7:0]
R/W
Bit
Name
Description
7:0
SPDR[7:0]
Serial peripheral data
This byte is used for transmitting or receiving data on SPI bus. A write of this byte is a write to the
shift register. A read of this byte is actually a read of the read data buffer. In Master mode, a write
to this register initiates transmission and reception of a byte simultaneously.
