MS51
Dec. 17, 2019
Page
143
of 316
Rev 1.01
M
S51
SE
RIES
TE
CHNICA
L REF
ERE
N
CE MA
NU
A
L
AINDIDS
– ADC Channel Digital Input Disconnect
Regiser
Address
Reset Value
AINDIDS
F6H, all page
0000_0000b
7
6
5
4
3
2
1
0
P11DIDS
P03DIDS
P04DIDS
P05DIDS
P06DIDS
P07DIDS
P30DIDS
P17DIDS
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit
Name
Description
n
PnDIDS
ADC Channel digital input disable
0 = ADC channel n digital input Enabled.
1 = ADC channel n digital input Disabled. ADC channel n is read always 0.
