MS51
Dec. 17, 2019
Page
304
of 316
Rev 1.01
M
S51
SE
RIES
TE
CHNICA
L REF
ERE
N
CE MA
NU
A
L
ADCMPH
– ADC Compare High Byte
Regiser
Address
Reset Value
ADCMPH
CFH, page 0
0000_0000b
7
6
5
4
3
2
1
0
ADCMP[11:4]
W/R
Bit
Name
Description
7:0
ADCMP[11:4]
ADC compare high byte
The most significant 8 bits of the ADC compare value stores in this register.
ADCMPL
– ADC Compare Low Byte
Regiser
Address
Reset Value
ADCMPL
CEH, page 0
0000_0000b
7
6
5
4
3
2
1
0
-
-
-
-
ADCMP[3:0]
-
-
-
-
W/R
Bit
Name
Description
3:0
ADCMP[3:0]
ADC compare low byte
The least significant 4 bits of the ADC compare value stores in this register.
AUXR1
– Auxiliary Register 1
Regiser
Address
Reset Value
AUXR1
A2H, all pages
POR 0000_0000b,
Software 1U00_0000b
nRESET pin U100_0000b
Others UUU0_0000b
7
6
5
4
3
2
1
0
SWRF
RSTPINF
HardF
SLOW
GF2
UART0PX
0
DPS
R/W
R/W
R/W
R/W
R/W
R/W
R
R/W
Bit
Name
Description
4
SLOW
ADC Slow Speed Selection
This bit is used to select ADC low speed.
0 = high speed 500 ksps
1 = low speed 200 ksps
