MS51
Dec. 17, 2019
Page
132
of 316
Rev 1.01
M
S51
SE
RIES
TE
CHNICA
L REF
ERE
N
CE MA
NU
A
L
PINEN
– Pin Interrupt Negative Polarity Enable
Regiser
Address
Reset Value
PINEN
EAH, all pages
0000_0000b
7
6
5
4
3
2
1
0
PINEN7
PINEN6
PINEN5
PINEN4
PINEN3
PINEN2
PINEN1
PINEN0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit
Name
Description
n
PINENn
Pin interrupt channel n negative polarity enable
This bit enables low-level/falling edge triggering pin interrupt channel n. The level or edge triggered
selection depends on each control bit PITn in PICON.
0 = Low-level/falling edge detect Disabled.
1 = Low-level/falling edge detect Enabled.
