MS51
Dec. 17, 2019
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Rev 1.01
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6.2.3
Power Monitoring And Reset
To prevent incorrect execution during power up and power drop, The MS51 provide three power
monitor functions, power-on detection and brown-out detection.
The MS51 has several options to place device in reset condition. It also offers the software flags to
indicate the source, which causes a reset. In general, most SFR go to their Reset value irrespective of
the reset condition, but there are several reset source indicating flags whose state depends on the
source of reset. User can read back these flags to determine the cause of reset using software. There
are five ways of putting the device into reset state. They are power-on reset, brown-out reset, external
reset, WDT reset, and software reset.
6.2.4
Power-On Reset and Low Voltage Reset
The MS51 incorporates an internal power-on reset (POR) and a low voltage reset (LVR). During a
power-on process of rising power supply voltage V
DD
, the POR or LVR will hold the MCU in reset
mode when V
DD
is lower than the voltage reference thresholds. This design makes CPU not access
program flash while the V
DD
is not adequate performing the flash reading. If an undetermined
operating code is read from the program flash and executed, this will put CPU and even the whole
system in to an erroneous state. After a while, V
DD
rises above the threshold where the system can
work, the selected oscillator will start and then program code will execute from 0000H. At the same
time, a power-on flag POF (PCON.4) will be set 1 to indicate a cold reset, a power-on process
complete. Note that the contents of internal RAM will be undetermined after a power-on. It is
recommended that user gives initial values for the RAM block.
The POF is recommended to be cleared to 0 via software to check if a cold reset or warm reset
performed after the next reset occurs. If a cold reset caused by power off and on, POF will be set 1
again. If the reset is a warm reset caused by other reset sources, POF will remain 0. User may take a
different course to check other reset flags and deal with the warm reset event. For detailed electrical
characteristics.
PCON
– Power Control
Regiser
Address
Reset Value
PCON
87H, all pages
POR, 0001_0000b
Others,000U_0000b
7
6
5
4
3
2
1
0
SMOD
SMOD0
LPR
POF
GF1
GF0
PD
IDL
R/W
R/W
RW
R/W
R/W
R/W
R/W
R/W
Bit
Name
Description
4
POF
Power-on reset flag
This bit will be set as 1 after a power-on reset. It indicates a cold reset, a power-on reset complete.
This bit remains its value after any other resets. This flag is recommended to be cleared via
software.
6.2.5
Brown-Out Detect and Reset
The brown-out detection circuit is used for monitoring the V
DD
level during execution. When V
DD
drops
to the selected brown-out trigger level (V
BOD
), the brown-out detection logic will reset the MCU if
BORST (BODCON0.2) setting 1. After a brown-out reset, BORF (BODCON0.1) will be set as 1 via
hardware. BORF will not be altered by any reset other than a power-on reset or brown-out reset itself.
This bit can be set or cleared by software.
