INDEX
Index-8
MCF5272 User’s Manual
event, 11-13
mask, 11-14
vector status, 11-14
interrupt controller
interrupt controller, pending and mask, 7-4, 7-5
JTAG instruction, 21-7
local memory, 4-2
MASK, 2-17
maximum frame length, 11-24
MBAR, 2-20, 6-4
MII management frame, 11-17
MII speed control, 11-19
module base address, 2-20
output port command, 16-18
P0B1RR–P3B1RR, 13-16
P0B2RR–P3B2RR, 13-17
P0CR–P3CR, 13-20
P0GCIR–P3GCIR, 13-29
P0GMT–P3GMT, 13-27
P0ICR–P3ICR, 13-22
P0PSR–P3PSR, 13-24
P0SDR–P3SDR, 13-34
P3B1TR–P0B1TR, 13-18
P3B2TR–P0B2TR, 13-19
P3DRR–P0DRR, 13-17
P3DTR–P0DTR, 13-19
P3GCIT–P0GCIT, 13-31
P3GMR–P0GMR, 13-26
PADDR, 17-10
PAR, 7-9
PASR, 13-25
PBDDR, 17-10
PBR, 5-12
PCDDR, 17-11
PCSR, 13-34
PDCSR, 13-32
PDRQR, 13-33
PGCITSR, 13-31
PGMTA, 13-28
PGMTS, 13-28
PLCR, 13-21
PLIC
aperiodic status, 13-25
B1 data transmit, 13-18
B2 data receive, 13-17
clock select, 13-34
D data transmit, 13-19
D-Channel status, 13-32
GCI C/I channel
GCI monitor channel
transmit, 13-27
transmit status, 13-28
general, 13-16
interrupt configuration, 13-22
loopback control, 13-21
memory map, 13-15
periodic status, 13-24
port configuration, 13-20
receive data, 13-4
sync delay, 13-34
transmit data, 13-5
PMR, 6-7
pointer-to-receive descriptor ring, 11-28
pointer-to-transmit descriptor ring, 11-29
power management, 6-7
PWM control, 18-3
PWM width, 18-4
QSPI
address, 14-14
data, 14-14
delay, 14-11
interrupt, 14-12
mode, 14-9
wrap, 14-12
RAM base address, 2-20
RAM perfect match address
RAMBAR, 2-20
RAREG/RDREG, 5-23
RCREG, 5-34
RDMREG, 5-36
read control, 5-34
read debug module, 5-36
receive buffer size, 11-30
receive control, 11-23
ROM base address, 4-6
SCR, 6-5
SDCR, 9-7
SDRAM
configuration, 9-7
general, 9-7
timing, 9-9
SDTR, 9-9
SIM
base address, 7-6, 7-8
memory map, 6-3
module base address, 6-4
SPR, 6-6
SR, 2-18
SRAM base address, 4-3
status, 2-18, 2-18
system configuration, 6-5
system protection, 6-6
Summary of Contents for DigitalDNA ColdFire MCF5272
Page 1: ...MCF5272UM D Rev 0 02 2001 MCF5272 ColdFire Integrated Microprocessor User s Manual ...
Page 38: ...xxxviii MCF5272 User s Manual TABLES Table Number Title Page Number ...
Page 58: ...1 10 MCF5272 User s Manual MCF5272 Specific Features ...
Page 90: ...2 42 MCF5272 User s Manual Exception Processing Overview ...
Page 96: ...3 6 MCF5272 User s Manual MAC Instruction Execution Timings ...
Page 158: ...5 46 MCF5272 User s Manual Motorola Recommended BDM Pinout ...
Page 184: ...7 12 MCF5272 User s Manual Interrupt Controller Registers ...
Page 338: ...13 44 MCF5272 User s Manual Application Examples ...
Page 414: ...18 6 MCF5272 User s Manual PWM Programming Model ...
Page 452: ...19 38 MCF5272 User s Manual Power Supply Pins ...
Page 482: ...20 30 MCF5272 User s Manual Reset Operation ...
Page 492: ...21 10 MCF5272 User s Manual Non IEEE 1149 1 Operation ...