Motorola CMOS Logic, Manual, Page: 407 / 571

MOTOROLA CMOS LOGIC DATA
6–369
MC14538B
Figure 4. Switching Test Waveforms
RESET
A
B
tPLH
Q
Q
50%
tWH
90%
10%
tTLH
tTHL
tWL
tTHL tPHL
tTHL
90%
10%
50%
T
50% 50% 50%
90%
10%
tPLH
tTHL
tTLH
tPHL
tWL
50%
90%
10%
tPHL tPHL
tTLH
tTHL
tPLH
50% 50%
90%
10%
50%
50%
50%
trr
50% VDD
VDD
VDD
tTLH
Figure 5. Typical Normalized Distribution
of Units for Output Pulse Width
Figure 6. Typical Pulse Width Variation as
a Function of Supply Voltage VDD
0
0.2
0.4
0.6
0.8
1.0
– 4 – 2 0 2 4
T, OUTPUT PULSE WIDTH (%)
RELA
TIVE FREQUENCY
OF OCCURRENCE
2
1
0
1
2
15 14 13 12 11 10 9 8 7 6 5
VDD, SUPPLY VOLTAGE (VOLTS)
NORMALIZED PULSE WIDTH CHANGE
WITH
RESPECT
T
O
V
ALUE
A
T
V
DD
= 10 V (%)
TA = 25
°
C
RX = 100 k
Ω
CX = 0.1
µ
F
0% POINT PULSE WIDTH
VDD = 5.0 V, T = 9.8 ms
VDD = 10 V, T = 10 ms
VDD = 15 V, T = 10.2 ms
RX = 100 k
Ω
CX = 0.1
µ
F
Figure 7. Typical Total Supply Current
versus Output Duty Cycle
T
O
TA
L SUPPL
Y
CURRENT
(
A
)
µ
1000
100
10
1.0
0.1
0.001 0.1 1.0 10 100
OUTPUT DUTY CYCLE (%)
RX = 100 k
Ω
, CL = 50 pF
ONE MONOSTABLE SWITCHING ONLY
VDD = 15 V
10 V
5.0 V
FUNCTION TABLE
Inputs Outputs
Reset A B Q Q
H H
H L
H L Not Triggered
H H Not Triggered
H L, H, H Not Triggered
H L L, H, Not Triggered
L X X L H
X X Not Triggered