Motorola CMOS Logic, Manual, Page: 272 / 571

MOTOROLA CMOS LOGIC DATA MC14503B
6–234
Figure 1. Switching Time Test Circuit and Waveforms
(tTLH, tTHL, tPHL, and tPLH)
PULSE
GENERATOR
DISABLE
INPUT
INPUT
VDD
16
VSS CL
OUTPUT
20 ns 20 ns
VDD
VSS
VOH
VOL
tPHL
tTHL tTLH
tPLH
90%
50%
10%
OUTPUT
INPUT
tPLH tPHL
90%
50%
10%
Figure 2. 3–State AC Test Circuit and Waveforms
(tPLZ, tPHZ, tPZH, tPZL)
PULSE
GENERATOR
DISABLE INPUT
16
VSS
1 k
OUTPUT
20 ns 20 ns
VDD
50%
90%
VDD
1 k
8
INPUT
tPHZ, tPZH CIRCUIT
PULSE
GENERATOR
DISABLE INPUT
tPLZ, tPZL CIRCUIT
OUTPUT
VSS 8
16
INPUT
CL
CL
VDD
VSS
VOH
VOL
≈
VOL + 0.05 V
≈
VOH – 0.15 V
10%
90%
10%
90%
10%
tPLZ
tPHZ tPZH
tPZL
OUTPUT FOR tPZH, tPZL CIRCUIT
OUTPUT FOR tPHZ, tPLZ CIRCUIT
DISABLE INPUT