Z51F6412
Product Specification
PS030302-0212
P R E L I M I N A R Y
175
PDATA ADDRL ADDRM ADDRH DATA0 DATA1 ---
DATAn
n-byte data read
with 2-byte
address
nALE L
L
H
H
H
H
H
nWR
L H L H H H H H H H H H H H
nRD
H H H H L H L H L H L H L H
PDATA ADDRL ADDRM DATA0 DATA1 DATA2 ---
DATAn
n-byte data write
with 2-byte
address
nALE L
L
H
H
H
H
H
nWR
L H L H L H L H L H L H L H
nRD
H H H H H H H H H H H H H H
PDATA ADDRL ADDRM DATA0 DATA1 DATA2 ---
DATAn
n-byte data read
with 1-byte
address
nALE L
H
H
H
H
H
H
nWR
L H H H L H L H L H L H L H
nRD
H H L H H H H H H H H H H H
PDATA ADDRL DATA0 DATA1 DATA2 DATA3 ---
DATAn
n-byte data write
with 1-byte
address
nALE L
H
H
H
H
H
H
nWR
L H L H L H L H L H L H L H
nRD
H H H H H H H H H H H H H H
PDATA ADDRL DATA0 DATA1 DATA2 DATA3 ---
DATAn
15.5.3 Parallel Mode timing diagram
nALE
nWR
nRD
PDATA
Read @0F000H
AM(F0H)
AL(00H)
DO
Read @0A000H
AM(A0H)
AL(00H)
AL(01H)
DO
Read @0A001H
Write
Write
Write
Read
Write
Write
Read
Write
T
AS
T
AH
Read
address auto- increment
AH(00H)
DO
Read
AL
AM
AH
Data Out
AL
AM
Data Out
AL
Data Out
Data Out
DO
1
-
byte read with 3
1- byte read with 2 -byte address
2- byte read with 1-byte address
T
OA
Read @0A002H
T
RL
T
RH
T
AWS
T
AWH
T
ARS
T
ARH
-byte address
Figure 15-6 Parallel Byte Read Timing of Program Memory
