Z51F6412
Product Specification
PS030302-0212
P R E L I M I N A R Y
174
15.5 Parallel Mode
15.5.1 Overview
Parallel program mode transfers address and data by byte. 3-byte address can be entered by one
from the lease significant byte of address. If only LSB is changed, only one byte can be transferred.
And if the second byte is changed, the first and second byte can be transferred. Upper 4-bit of the
most significant byte selects memory to be accessed. Table 15-3 shows memory type. Address auto-
increment is supported when read or write data without address
Table 15-4 The selection of memory type by ADDRH[7:4]
ADDRH[7:4]
Memory Type
0 0 0 0 Program
Memory
0 0 0 1 External
Memory
0 0 1 0 SFR
15.5.2 Parallel Mode instruction format
Instruction Signal
Instruction
Sequence
n-byte data read
with 3-byte
address
nALE L
L
L
H
H
H
H
nWR
L H L H L H H H H H H H H H
nRD
H H H H H H L H L H L H L H
PDATA ADDRL ADDRM ADDRH DATA0 DATA1 ---
DATAn
n-byte data write
with 3-byte
address
nALE L
L
L
H
H
H
H
nWR
L H L H L H L H L H L H L H
nRD
H H H H H H H H H H H H H H
P0[7:0] (PDATA[7:0])
P1[1] (nWR)
P1[0] (nALE)
nTEST
P1[2] (nRD)
DSDA
Figure 15-5 Pin diagram for parallel programming
