IXYS zilog Z51F6412, Manual

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Z51F6412
Product Specification
PS030302-0212 P R E L I M I N A R Y 106
UCTRL12 FBH R/W 00H USART Control 2 Register 1
UCTRL13 FCH R/W 00H USART Control 3 Register 1
USTAT1 FDH R 80H USART Status Register 1
UBAUD1 FEH R/W FFH USART Baud Rate Generation Register 1
UDATA1 FFH R/W 00H USART Data Register 1
UCTRL21 2F28H R/W 00H USART Control 1 Register 2
UCTRL22 2F29H R/W 00H USART Control 2 Register 2
UCTRL23 2F2AH R/W 00H USART Control 3 Register 2
USTAT2 2F2BH R 80H USART Status Register 2
UBAUD2 2F2CH R/W FFH USART Baud Rate Generation Register 2
UDATA2 2F2DH R/W 00H USART Data Register 2
UCTRL31 2F30H R/W 00H USART Control 1 Register 3
UCTRL32 2F31H R/W 00H USART Control 2 Register 3
UCTRL33 2F32H R/W 00H USART Control 3 Register 3
USTAT3 2F33H R 80H USART Status Register 3
UBAUD3 2F34H R/W FFH USART Baud Rate Generation Register 3
UDATA3 2F35H R/W 00H USART Data Register 3
11.7.12 USART Register description
USART module consists of USART Control 1 Register (UCTRLx1), USART Control 2 Register
(UCTRLx2), USART Control 3 Register (UCTRLx3), USART Status Register (USTATx), USART Data
Register (UDATAx), and USART Baud Rate Generation Register (UBAUDx).
11.7.13 Register description for USART
UCTRLx1 (USART Control 1 Register) : E2H, FAH, 2F28H, 2F30H
7 6 5 4 3 2 1 0
UMSEL1 UMSEL0 UPM1 UPM0 USIZE2
USIZE1
UDORD
USIZE0
UCPHA
UCPOL
R/W R/W R/W R/W R/W R/W R/W R/W
Initial value : 00H
UMSEL[1:0]
Selects operation mode of USART.
UMSEL1 UMSEL0 Operation Mode
0 0 Asynchronous Mode (Uart)
0 1 Synchronous Mode
1 0 Reserved
1 1 SPI Mode
UPM[1:0]
Selects Parity Generation and Check methods
UPM1 UPM0 Parity
0 0 No Parity
0 1 Reserved
1 0 Even Parity
1 1 Odd Parity
USIZE[2:0]
When in asynchronous or synchronous mode of operation, selects the
length of data bits in frame.
USIZE2 USIZE1 USIZE0 Data Length