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Z51F6412
Product Specification
PS030302-0212
P R E L I M I N A R Y
151
13.4 RESET Noise Canceller
The Figure 13-2 is the Noise canceller diagram for Noise cancel of RESET. It has the Noise cancel
value of about 7us (@V
DD
=5V) to the low input of System Reset.
13.5 Power ON RESET
When rising device power, the POR (Power ON Reset) have a function to reset the device. If using
POR, it executes the device RESET function instead of the RESET IC or the RESET circuits. And
External RESET PIN is able to use as Normal I/O pin.
VDD
nPOR
(Internal Signal)
Internal RESETb
Oscillation
BIT Starts
BIT Overflows
Fast VDD Rise Time
t > T
RNC
t > T
RNC
t > T
RNC
t < T
RNC
t < T
RNC
A
A
’
Figure 13-2 Reset noise canceller time diagram
Figure 13-3 Fast VDD rising time