Z51F6412
Product Specification
PS030302-0212
P R E L I M I N A R Y
165
0 No
interrupt
request.
1 Interrupt
request.
WMODE
Write mode flag
EMODE
Erase mode flag
VMODE
Verify mode flag
FETCR (Flash Time control Register) : ECH
7
6
5
4
3
2
1
0
TCR7
TCR6
TCR5
TCR4
TCR3
TCR2
TCR1
TCR0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value : 00H
TCR[7:0]
Flash Time control
Program and erase time is controlled by setting FETCR register. Program and erase timer uses 10-
bit counter. It increases by one at each divided system clock frequency(=SCLK/128). It is cleared
when program or erase starts. Timer stops when 10-bit counter is same to FETCR. PEVBSY is
cleared when program, erase or verify starts and set when program, erase or verify stops.
Max program/erase time at 14.7456Mhz system clock : (255+1) * 2 * ((1/fx) * 128) = 4.44ms
In the case of 10% of error rate of counter source clock, program or erase time is 2.67~3.264ms
* Program/erase time calculation
for page write or erase, Tpe = (TCON+1) * 2 * (SCLK * 128)
for bulk erase, Tbe = (TCON+1) * 4 * (SCLK * 128)
Table 15-2 Program/erase Time
Min
Typ
Max
Unit
program/erase Time
2.4
2.5
2.6
ms
FEARH (Flash address high Register) : F2H
7
6
5
4
3
2
1
0
ARH7
ARH6
ARH5
ARH4
ARH3
ARH2
ARH1
ARH0
W
W
W
W
W
W
W
W
Initial value : 00H
ARH[7:0]
Flash address high
FEARM (Flash address middle Register) : F3H
7
6
5
4
3
2
1
0
ARM7
ARM6
ARM5
ARM4
ARM3
ARM2
ARM1
ARM0
W
W
W
W
W
W
W
W
Initial value : 00H
ARM[7:0]
Flash address middle
※
Recommended program/erase time at 14.75Mhz (FETCR = 8Fh)
