Z51F6412
Product Specification
PS030302-0212
P R E L I M I N A R Y
166
FEARL (Flash address low Register) : F4H
7
6
5
4
3
2
1
0
ARL7
ARL6
ARL5
ARL4
ARL3
ARL2
ARL1
ARL0
W
W
W
W
W
W
W
W
Initial value : 00H
ARL[7:0]
Flash address low
FEAR registers are used for program, erase and auto-verify. In program and erase mode, it is page
address and ignored the same least significant bits as the number of bits of page address. In auto-
verify mode, address increases automatically by one.
FEARs are write-only register. Reading these registers returns 24-bit checksum results(FEARH,
FEARM, FEARL) or 16-bit CRC results(FEARM, FEARL) when PCRCRD bit of FESR is set.
FEDR (Flash control Register) : F5H
7
6
5
4
3
2
1
0
FEDR7
FEDR6
FEDR5
FEDR4
FEDR3
FEDR2
FEDR1
FEDR0
W
W
W
W
W
W
W
W
Initial value : 00H
FEDR[7:0]
Flash data
Data register. In no program/erase/verify mode, READ/WRITE of FECR read or write data from
Flash to this register or from this register to Flash.
The sequence of writing data to this register is used for EEPROM program entry. The mode entrance
sequence is to write 0xA5 and 0x5A to it in order.
FECR (Flash Control Register) : F6H
7
6
5
4
3
2
1
0
AEF
-
EXIT1
EXIT0
WRITE
READ
nFERST
nPBRST
R/W
-
R/W
R/W
R/W
R/W
R/W
R/W
Initial value : 03H
AEF
Enable Flash bulk erase mode
0
Disable bulk erase mode of Flash memory
1
Enable bulk erase mode of Flash memory
EXIT[1:0]
Exit from program mode. It is cleared automatically after 1 clock
EXIT1 EXIT0 Description
0
0
Don’t exit from program mode
0
1
Don’t exit from program mode
1
0
Don’t exit from program mode
1 1 Exit
from
program
mode
WRITE
Start to program or erase of Flash. It is cleared automatically after 1
clock
0 No
operation
1
Start to program or erase of Flash
READ
Start auto-verify of Flash. It is cleared automatically after 1 clock
0 No
operation
