Intel® Server System M50FCP1UR System Integration and Service Guide
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Error Code
Error Message
Action Message
Type
8607
Recovery boot has been initiated.
Note:
The Primary BIOS image may be corrupted or the
system may hang during POST. A BIOS update is
required.
Fatal
A100
BIOS ACM Error
Major
A421
PCI component encountered a SERR error
Fatal
A5A0
PCI Express component encountered a PERR error
Minor
A5A1
PCI Express component encountered an SERR error
Fatal
A6A0
DXE Boot Services driver: Not enough memory available
to shadow a Legacy Option ROM.
Disable option ROM at SETUP to save
runtime memory.
Minor
E.1 POST Error Beep Codes
The following table lists the POST error beep codes. Before system video initialization, the BIOS uses these
beep codes to inform users on error conditions. The beep code is followed by a user-visible code on the
POST progress LEDs.
Table 13. POST Error Beep Codes
Beeps
Error Message
POST Progress Code
Description
3 short
Memory error
Multiple
System halted because a fatal error related to the memory was
detected.
3 long
and 1
short
CPU mismatch error
E5, E6
System halted because a fatal error related to the CPU
family/core/cache mismatch was detected.
The integrated BMC may generate beep codes upon detection of failure conditions. Beep codes are sounded
each time that the problem is discovered, such as on each power-up attempt, but are not sounded
continuously. Codes that are common across all Intel server boards and systems that use same generation
chipset are listed in the following table. Each digit in the code is represented by a sequence of beeps whose
count is equal to the digit.
Table 14. Integrated BMC Beep Codes
Code
Reason for Beep
Associated Sensors
1-5-1-2
VR Watchdog Timer sensor assertion.
VR Watchdog Timer.
1-5-1-4
A PSU reports a failure, or the BMC detects the presence of a PSU
model that is incompatible with one or more other PSUs in the
system.
PS Status.
1-5-2-1
No CPUs installed or the first CPU socket is empty.
CPU Missing sensor.
1-5-2-2
CPU CAT Error (IERR) assertion.
CPU Status sensor.
1-5-2-3
CPU ERR2 timeout assertion.
CPU ERR2 Timeout sensor.
1-5-2-4
CPU/VR mismatch.
CPU Status sensor (configuration error
offset).
1-5-2-5
CPU population error.
CPU 0 Status sensor.
1-5-4-2
Power fault: DC power is unexpectedly lost (power good dropout). Power Unit – Power unit failure offset.
1-5-4-4
Power control fault (power good assertion timeout).
Power Unit – Soft power control failure
offset.
Summary of Contents for M50FCP1UR
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