RSO-RS2.
The register select lines are connected to the three lowest
address lines AO-A2 and allow the microprocessor to choose a GPIA
register to read from or write to.
IRQ.
The interrupt request output allows the GPIA to interrupt the
microprocessor.
RESET.
This input is used to initialize the GPIA. The signal is the
same RESET signal generated to reset the microprocessor.
E.
The enable input activates the address inputs, R/W input and
enables data transfer with the data bus. It is also used internally as
a state counter, allowing the GPIA to change interface states. E is
connected to the micropocessor clock output.
vss
40
!RO
l:J-FI GRfl\IT
39
38
RS!
37
R
/1r
36
IE0
35
ll0
3'
DI
33
183
D2
32
184
D3
10
3 1
!BS
D4
L L
30
1 86
D5
12
29
Il6
13
28
T/Rl
27
T�
26
25
24
TRIG
23
22
2
I
IFC
Figure 10.7-2. GPIA IC pins
HP-IB Interface Signals
IB0-187.
Eight HP-IB data lines.
DAC.
When valid data is received, the GPIA switches DAC high to
indicate that the data has been accepted.
RFD.
The GPIA switches the RFD line high to indicate that it is
ready for data.
DAV.
The GPIA pulls the DAV line low to indicate that it has valid
data to transmit.
ATN,IFC,SRQ,EOl,REN.
These bus management lines are used to
control the flow of data on the HP-IB data lines.
ASE.
Enables a data bus driver U36, which allows the remote
programmer to read the address set on the HP-IB address switch.
Servicing the Microprocessor and Front-panel 1o.7-3
Summary of Contents for 8112A
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Page 295: ...MP MP3 MP MP2 MP4 MPS MP 1 2 MPS MP MP I B ElElElEl Replaceable Parts A 3 ...
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