HP 8112A, Operating, Programming And Servicing Manual

Page: 274 / 406

Address Decoding
ADDRESS BUS
ROM SELECT
MA I N
DECODER S U B DECODER
I
SELECT
SUB DECODER 2
SELECT
SUB -
DECODER
2
Figure 1 O.7-3. Address decoding
}
LATCHED
BUS
}
D I SPLAY
Address decoding is performed at two levels, as shown in
Figure 10.7-3. The main decoder U12 uses microprocessor addresss
lines A12, A13 and A15 to enable one of the following:
• ROM U40
•
Sub-decoder 1 U13
• Sub-decoder 2 U14
Sub-decoder 1
If sub-decoder 1 U13 is enabled by the main decoder, it uses
microprocessor address lines A8, A9 and AlO to enable one of the
following:
• RAM UlO
• Keyboard Scanner U19
• GPIA U30
Sub-decoder 2
If sub-decoder 2 U14 is enabled by the main decoder, it uses
microprocessor address lines AO, Al and A2 to enable one of the
following:
• Latched Data Bus Latch U16
• Control Board Addressing via Ul8,U21 ,Ul 7
(
Refer to "Control
Board Address Decoding"
)
• Device Bus Feedback Latch U26
• Display Latche U23
• HP-IB Status Latch U37
10.7-4 Servicing the Microprocessor and Front-panel