Rev. 3.0, 04/02, page 1055 of 1064
(6)
BUS 32
(64M: 2M × 8b × 4) × 4 *
AMX 3
64M, column-addr-9bit
32MB
SH7751 Series Address Pins
RAS Cycle
CAS Cycle
Synchronous DRAM
Address Pins
Function
A16
A15
A24
A24
A13
A14
A23
A23
A12
BANK selects bank address
A13
A22
0
A11
A12
A21
H/L
A10
Address precharge setting
A11
A20
0
A9
A10
A19
A10
A8
A9
A18
A9
A7
A8
A17
A8
A6
A7
A16
A7
A5
A6
A15
A6
A4
A5
A14
A5
A3
A4
A13
A4
A2
A3
A12
A3
A1
A2
A11
A2
A0
Address
A1
Not used
A0
Not used
Summary of Contents for SH7751
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