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31
PCIDMABT
H'0000 0000
H'0000 0004
H'1BFF FFFC
H'0000 0000
H'0000 0004
H'0000 000C
H'FFFF FFFC
Arbitration mode
External memory
space
PCI memory/
I/O space
DMA
transfer
32 bits
0: Fixed priority
1: Pseudo round-robin
0
1
31 28
PCIDLA
0
31
26 25
PCIDTC
0
31
PCIDPA
0
31
11 10
PCIDCR
0
Transfer control
PCI address
Transfer count
Local address
Area 0: H'00000000 to
H'03FFFFFF
Area 1: H'04000000 to
H'07FFFFFF
Area 2: H'0800 0000 to
H'0BFFFFFF
Area 3: H'0C000000 to
H'0FFFFFFF
Area 4: H'10000000 to
H'13FFFFFF
Area 5: H'14000000 to
H'17FFFFFF
Area 6: H'18000000 to
H'1BFFFFFF
32 bits
.
.
.
.
.
.
.
.
.
.
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.
.
Figure 22.5 Example of DMA Transfer Control Register Settings
Summary of Contents for SH7751
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