Reference
Opcode
or
or/c
or/nc
or
soor
xoor
xor
xor/c
xor/nc
xor
sxor
xxor
not
not/c
not/nc
not
snot
xnot
jpr / jpr.d
sjpr / sjpr.d
xjpr / xjpr.d
jpa / jpa.d
sjpa / sjpa.d
xjpa / xjpa.d
jrgt / jrgt.d
sjrgt / sjrgt.d
xjrgt / xjrgt.d
Operand
%rd, %rs
%rd, %rs
%rd, %rs
%rd, sign7
%rd, imm16
%rd, imm16
%rd, %rs
%rd, %rs
%rd, %rs
%rd, sign7
%rd, imm16
%rd, imm16
%rd, %rs
%rd, %rs
%rd, %rs
%rd, sign7
%rd, imm16
%rd, imm16
%rb
sign10
label
±
imm20
sign20
label
±
imm24
sign24
%rb
imm7
label
±
imm20
imm20
label
±
imm24
imm24
sign7
label
±
imm20
sign20
label
±
imm24
sign24
Function
d(15:0)
←
rd(15:0) | rs(15:0), rd(23:16)
←
0
rd(15:0)
←
rd(15:0) | rs(15:0), rd(23:16)
←
0 if C = 1 (nop if C = 0)
rd(15:0)
←
rd(15:0) | rs(15:0), rd(23:16)
←
0 if C = 0 (nop if C = 1)
rd(15:0)
←
rd(15:0) | sign7(with sign extension), rd(23:16)
←
0
rd(15:0)
←
rd(15:0) | imm16, rd(23:16)
←
0
rd(15:0)
←
rd(15:0) | imm16, rd(23:16)
←
0
rd(15:0)
←
rd(15:0)^rs(15:0), rd(23:16)
←
0
rd(15:0)
←
rd(15:0)^rs(15:0), rd(23:16)
←
0 if C = 1 (nop if C = 0)
rd(15:0)
←
rd(15:0)^rs(15:0), rd(23:16)
←
0 if C = 0 (nop if C = 1)
rd(15:0)
←
rd(15:0)^sign7(with sign extension), rd(23:16)
←
0
rd(15:0)
←
rd(15:0)^imm16, rd(23:16)
←
0
rd(15:0)
←
rd(15:0)^imm16, rd(23:16)
←
0
rd(15:0)
←
!rs(15:0), rd(23:16)
←
0
rd(15:0)
←
!rs(15:0), rd(23:16)
←
0 if C = 1 (nop if C = 0)
rd(15:0)
←
!rs(15:0), rd(23:16)
←
0 if C = 0 (nop if C = 1)
rd(15:0)
←
!sign7(with sign extension), rd(23:16)
←
0
rd(15:0)
←
!imm16, rd(23:16)
←
0
rd(15:0)
←
!imm16, rd(23:16)
←
0
pc
←
pc+2+rb
pc
←
pc+2+sign11; sign11={sign10,0}
pc
←
label
±
imm20
pc
←
pc+2+sign20
pc
←
label
±
imm24
pc
←
pc+2+sign24
pc
←
rb
pc
←
imm7
pc
←
label
±
imm20
pc
←
imm20
pc
←
label
±
imm24
pc
←
imm24
pc
←
pc+2+sign8 if !Z&!(N^V) is true; sign8={sign7,0}
pc
←
label
±
imm20 if !Z&!(N^V) is true
pc
←
pc+2+sign20 if !Z&!(N^V) is true
pc
←
label
±
imm24 if !Z&!(N^V) is true
pc
←
pc+2+sign24 if !Z&!(N^V) is true
D
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
IL
–
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IE
–
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Z
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
N
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
–
–
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C
–
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–
–
V
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Mnemonic
Classification
Logic
operation
Branch
Flags
Instruction List (7)
Assembly Programming
Remarks
Summary of Contents for S5U1C17001C
Page 6: ......
Page 17: ...1 General S5U1C17001C Manual 1 General ...
Page 18: ......
Page 21: ...1 2 Install S5U1C17001C Manual 2 Installation ...
Page 22: ......
Page 29: ...3 SoftDev S5U1C17001C Manual 3 Software Development Procedures ...
Page 30: ......
Page 103: ...4 SrcFiles S5U1C17001C Manual 4 Source files ...
Page 104: ......
Page 121: ...5 IDE S5U1C17001C Manual 5 gnU17 iDE ...
Page 122: ......
Page 365: ...6 Compiler S5U1C17001C Manual 6 C Compiler ...
Page 366: ......
Page 385: ...7 Library S5U1C17001C Manual 7 library ...
Page 386: ......
Page 405: ...8 Assemblr S5U1C17001C Manual 8 assembler ...
Page 406: ......
Page 439: ...9 Linker S5U1C17001C Manual 9 linker ...
Page 440: ......
Page 449: ...10 Debugger S5U1C17001C Manual 10 Debugger ...
Page 450: ......
Page 626: ...11 Tools S5U1C17001C Manual 11 Other Tools ...
Page 627: ......
Page 696: ...S1C17 Family C Compiler Package Quick Reference Reference ...