C A U T I O N
If you manually change the termination, a warning message is shown, indicating
that the termination is not typically appropriate for the logic family. If you answer
No
, the warning message closes with no changes to the terminations. If you answer
Yes
, the data termination voltage is applied and the Logic Level is changed to
CUSTOM.
“Why Incorrect Terminations Could Damage Your Device” on page 76
The following table lists the characteristics generally associated with
some logic families. All values are nominal.
Table 14
Logic Family
V
high
[V]
V
low
[V]
Ampl. [mV]
Term. [V]
ECL
- 0.95
- 1.7
750
- 2
SCFL
0
- 0.9
900
0
LVPECL
+ 2.35
+ 1.6
750
+ 1.3
LVDS
+ 1.425
+ 1.075
350
+ 1.250
CML
0
- 0.4
400
0
Terms:
•
ECL
Emitter Coupled Logic
•
SCFL
Source Coupled FET Logic
•
LVPECL
Low Voltage Positive Emitter Coupled Logic (PECL Lite)
•
LVDS
Low Voltage Differential Signaling
•
CML
Current Mode Logic
Setting up the Pattern Generator
3
Agilent J-BERT N4903 High-Performance Serial BERT
75
Summary of Contents for J-BERT N4903
Page 1: ...S Agilent J BERT N4903 High Performance Serial BERT User Guide s Agilent Technologies...
Page 68: ...2 Setting up Patterns 68 Agilent J BERT N4903 High Performance Serial BERT...
Page 158: ...4 Setting up the Error Detector 158 Agilent J BERT N4903 High Performance Serial BERT...
Page 314: ...6 Evaluating Results 314 Agilent J BERT N4903 High Performance Serial BERT...
Page 374: ...7 Jitter Tolerance Tests 374 Agilent J BERT N4903 High Performance Serial BERT...
Page 394: ...8 Solving Problems 394 Agilent J BERT N4903 High Performance Serial BERT...
Page 434: ...Index 434 Agilent J BERT N4903 High Performance Serial BERT...
