H.13
Date Code 20170814
Instruction Manual
SEL-700G Relay
Synchrophasors
Synchrophasor Relay Word Bits
The Relay Word bit TSOK provides the indication that the time
synchronization is OK. The SEL-700G determines the suitability of the
IRIG-B signal for normal accuracy by applying several tests:
➤
Seconds, minutes, and day fields are in range
➤
Time from two consecutive messages differs by one second,
except for leap second or daylight-saving time transitions
➤
When IRIGC = C37.118, the signal contains the correct
parity bit
The SEL-700G determines the suitability of the IRIG-B signal for high-
accuracy timekeeping by applying two additional tests:
➤
The jitter between positive transitions (rising edges) of the clock
signal is less than 500 ns
➤
The time error information contained in the IRIG-B control field
indicates time error is less than 10
-6
seconds (1 µs)
When IRIGC = NONE, the relay asserts TSOK when only the first test is met.
When IRIGC = C37.118 and an appropriate IRIG-B signal is connected,
Relay Word bit TSOK only asserts when these two tests are met. The time
error information in the IRIG-B control field is mapped to the TQUAL bits in
the relay. Table H.9 provides the information for the TQUAL bits and how
they translate to time quality. The values 0 (Locked) and 4 (1 microsecond)
indicate that the relay is receiving high-accuracy IRIG.
When IRIG signal is lost, IRIGOK deasserts. However, TSOK remains
asserted for a holdover period as long as 15 seconds. If the IRIG signal is not
restored within 15 seconds, TSOK also deasserts.
Table H.8
Time-Synchronization Relay Word Bits
Name
Description
IRIGOK
Asserts while relay time is based on IRIG-B time source.
TSOK
Time Synchronization OK. Asserts while time is based on an IRIG-B
time source of sufficient accuracy for synchrophasor measurement.
PMDOK
Phasor measurement data OK. Asserts when the SEL-700G is enabled,
synchrophasors are enabled (Global setting EPMU = Y), Relay Word
bit TSOK = 1, the frequency is 40–70 Hz, and the positive-sequence
voltage(s) V1 > 10 V secondary. The SEL-700GW model uses the
positive-sequence current I1 > 0.1 • INOM secondary, instead of the
positive-sequence voltages. A few seconds may be necessary for
PMDOK to assert when the relay is first powered, after any of the
settings are changed, or when an IRIG-B time signal is first connected.
Table H.9
TQUAL Bits Translation to Time Quality
(Sheet 1 of 2)
TQUAL8
TQUAL4
TQUAL2
TQUAL1
Value
Time Quality
0
0
0
0
0
Locked
0
0
0
1
1
1 nanosecond
0
0
1
0
2
10 nanoseconds
0
0
1
1
3
100 nanoseconds
0
1
0
0
4
1 microsecond
0
1
0
1
5
10 microseconds
0
1
1
0
6
100 microseconds
0
1
1
1
7
1 millisecond
NOTE:
The jitter measurement for
the IRIG signal could take as long as
15 seconds to determine. During this
time TSOK is not asserted.
Содержание SEL-700G Series
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