Schweitzer Engineering Laboratories SEL-700G Series, Инструкция по эксплуатации

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4.106
SEL-700G Relay Instruction Manual Date Code 20170814
Protection and Logic Functions
Group Settings (SET Command)
The settings involved with the internal enables (for example, settings a2, k2,
a0, and a0N) are explained in Directional Control Settings on page 4.121.
Best Choice Ground Directional Element Logic.
The Best Choice
Ground Directional Element logic determines which directional element
should be enabled to operate. The residual-ground overcurrent elements set
for directional control are then controlled by this enabled directional element.
Table 4.28 is the embodiment of the Best Choice Ground Directional logic
(refer to Figure 4.72, Figure 4.73, Figure 4.78, Figure 4.79, and Figure 4.80).
Setting choice U can only be listed by itself (ORDER = U), so Best Choice
Ground Directional Element logic is irrelevant in this case, just as it is also
irrelevant when Q, V, or I are listed by themselves in setting ORDER.
Directional Element Routing.
Refer to Figure 4.72 and Figure 4.81 for
routing of directional elements to residual-ground overcurrent elements and
Figure 4.73 and Figure 4.82 for routing of directional elements to neutral-
ground overcurrent elements.
The directional element outputs are routed to the forward (Relay Word bits
DIRGF and DIRNF) and reverse (Relay Word bits DIRGR and DIRNR) logic
points and then on to the direction forward/reverse logic in Figure 4.83 and
Figure 4.84.
Loss-of-Potential.
Refer to Figure 4.120 and the accompanying text for
more information on loss-of-potential. Some or all of the voltage-based
directional elements are disabled during a loss-of-potential condition. Thus,
the overcurrent elements controlled by these voltage-based directional
elements are also disabled. However, this disable condition is overridden for
these overcurrent elements set direction forward if setting EFWDLOP := Y.
The effect of LOP on the internal enables associated with the voltage-based
directional elements is described below (refer to Figure 4.74, Figure 4.75, and
Figure 4.76).
➤
If DELTAY_ := WYE and an LOP condition occur (Relay Word
bit LOP asserts), the internal enables associated with the
voltage-based directional elements, DIRVE, DIRQE, DIRQGE
and DIRNEX get disabled.
➤
If DELTAY_ := DELTA, EXT3V0_X := NONE (Note that
EXT3V0_X is only available on the X side), and an LOP
condition occurs, the internal enables associated with the
voltage-based directional elements DIRQE and DIRQGE get
disabled (DIRVE and DIRNEX are not applicable under this
condition).
➤
If DELTAY_ := DELTA, EXT3V0_X := VS or VN, and an LOP
condition occur, the internal enables associated with the voltage-
based directional elements DIRQE, DIRQGE get disabled.
DIRVEX and DIRNEX are enabled under this condition.
(DIRVEY is not applicable under this condition)
The internal enable associated with channel IN current polarized directional
element, DIRIE, does not use voltage in making directional decisions, thus an
LOP condition does not disable the element.
The effect of LOP on the residual-ground directional logic is described below
(refer to Figure 4.81).