
UM10800
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User manual
Rev. 1.2 — 5 October 2016
25 of 487
NXP Semiconductors
UM10800
Chapter 4: LPC82x Nested Vectored Interrupt Controller (NVIC)
4.4.8 Interrupt Priority Register 2
The IPR2 register controls the priority of four peripheral interrupts. Each interrupt can
have one of 4 priorities, where 0 is the highest priority.
4.4.9 Interrupt Priority Register 3
The IPR3 register controls the priority of four peripheral interrupts. Each interrupt can
have one of 4 priorities, where 0 is the highest priority.
4.4.10 Interrupt Priority Register 4
The IPR3 register controls the priority of four peripheral interrupts. Each interrupt can
have one of 4 priorities, where 0 is the highest priority.
Table 14.
Interrupt Priority Register 2 (IPR2, address 0xE000 E408) bit description
Bit
Symbol
Description
5:0
-
These bits ignore writes, and read as 0.
7:6
IP_I2C0
Interrupt Priority. 0 = highest priority. 3 = lowest priority.
13:8
-
These bits ignore writes, and read as 0.
15:14 IP_SCT
Interrupt Priority. 0 = highest priority. 3 = lowest priority.
21:16 -
These bits ignore writes, and read as 0.
23:22 IP_MRT
Interrupt Priority. 0 = highest priority. 3 = lowest priority.
29:24 -
These bits ignore writes, and read as 0.
31:30 IP_CMP
Interrupt Priority. 0 = highest priority. 3 = lowest priority.
Table 15.
Interrupt Priority Register 3 (IPR3, address 0xE000 E40C) bit description
Bit
Symbol
Description
5:0
-
These bits ignore writes, and read as 0.
7:6
IP_WDT
Interrupt Priority. 0 = highest priority. 3 = lowest priority.
13:8
-
These bits ignore writes, and read as 0.
15:14 IP_BOD
Interrupt Priority. 0 = highest priority. 3 = lowest priority.
21:16 -
These bits ignore writes, and read as 0.
23:22 IP_FLASH
Interrupt Priority. 0 = highest priority. 3 = lowest priority.
29:24 -
These bits ignore writes, and read as 0.
31:30 IP_WKT
Interrupt Priority. 0 = highest priority. 3 = lowest priority.
Table 16.
Interrupt Priority Register 4 (IPR4, address 0xE000 E410) bit description
Bit
Symbol
Description
5:0
-
These bits ignore writes, and read as 0.
7:6
IP_ADC_SEQA
Interrupt Priority. 0 = highest priority. 3 = lowest priority.
13:8
-
These bits ignore writes, and read as 0.
15:14 IP_ADC_SEQB
Interrupt Priority. 0 = highest priority. 3 = lowest priority.
21:16 -
These bits ignore writes, and read as 0.
23:22 IP_ADC_THCMP
Interrupt Priority. 0 = highest priority. 3 = lowest priority.
29:24 -
These bits ignore writes, and read as 0.
31:30 IP_ADC_OVR
Interrupt Priority. 0 = highest priority. 3 = lowest priority.