CHAPTER 9 TIMER/COUNTER FUNCTION
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User’s Manual U15195EJ5V0UD
(3) Capture operation
The TM3 register has two capture/compare registers. These are the CC30 register and the CC31 register. A
capture operation or a compare operation is performed according to the settings of both the CMS1 and CMS0
bits of the TMC31 register. If the CMS1 and CMS0 bits of the TMC31 register are set to 0, the register
operates as a capture register.
A capture operation that captures and holds the TM3 count value asynchronously relative to the count clock
is performed synchronized with an external trigger. The valid edge that is detected from an external interrupt
request input pin (INTP30 or INTP31) is used as an external trigger (capture trigger). The TM3 count value
during counting is captured and held in the capture register, synchronized with that capture trigger signal.
The capture register value is held until the next capture trigger is generated.
Also, an interrupt request (INTCC30 or INTCC31) is generated by INTP30 or INTP31 signal input.
The valid edge of the capture trigger is set by valid edge selection register (SESC).
If both the rising and falling edges are set as capture triggers, the input pulse width from an external source
can be measured. Also, if only one of the edges is set as the capture trigger, the input pulse cycle can be
measured.
Figure 9-91. Capture Operation Example
TM3
0
TM3CE
INTP31
CC31
(Capture register)
n
n
(Capture trigger)
(Capture trigger)
Remarks 1.
When the TM3CE bit is 0, no capture operation is performed even if INTP31 is input.
2.
Valid edge of INTP31: Rising edge
Содержание PD703114
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