CHAPTER 3 CPU FUNCTION
68
User’s Manual U15195EJ5V0UD
3.4.8
On-chip peripheral I/O registers
(1/10)
Bit Units for Manipulation
Address Function
Register
Name
Symbol
R/W
1 Bit
8 Bits 16 Bits
After Reset
FFFFF004H Port
DL
PDL
R/W
√
Undefined
FFFFF004H Port
DLL
PDLL
R/W
√
√
Undefined
FFFFF005H Port
DLH
PDLH
R/W
√
√
Undefined
FFFFF006H Port
DH
PDH
R/W
√
√
Undefined
FFFFF00AH Port
CT
PCT
R/W
√
√
Undefined
FFFFF00CH Port
CM
PCM
R/W
√
√
Undefined
FFFFF024H
Port DL mode register
PMDL
R/W
√
FFFFH
FFFFF024H Port DL mode register L
PMDLL
R/W
√
√
FFH
FFFFF025H Port DL mode register H
PMDLH
R/W
√
√
FFH
FFFFF026H
Port DH mode register
PMDH
R/W
√
√
FFH
FFFFF02AH
Port CT mode register
PMCT
R/W
√
√
FFH
FFFFF02CH
Port CM mode register
PMCM
R/W
√
√
FFH
FFFFF044H
Port DL mode control register
PMCDL
R/W
√
0000H/FFFFH
FFFFF044H Port DL mode control register L
PMCDLL
R/W
√
√
00H/FFH
FFFFF045H Port DL mode control register H
PMCDLH
R/W
√
√
00H/FFH
FFFFF046H
Port DH mode control register
PMCDH
R/W
√
√
00H/FFH
FFFFF04AH
Port CT mode control register
PMCCT
R/W
√
√
00H/53H
FFFFF04CH
Port CM mode control register
PMCCM
R/W
√
√
00H/03H
FFFFF060H
Chip area selection control register 0
CSC0
R/W
√
2C11H
FFFFF062H
Chip area selection control register 1
CSC1
R/W
√
2C11H
FFFFF066H
Bus size configuration register
BSC
R/W
√
5555H
FFFFF06EH
System wait control register
VSWC
R/W
√
77H
FFFFF080H
DMA source address register 0L
DSA0L
R/W
√
Undefined
FFFFF082H
DMA source address register 0H
DSA0H
R/W
√
Undefined
FFFFF084H
DMA destination address register 0L
DDA0L
R/W
√
Undefined
FFFFF086H
DMA destination address register 0H
DDA0H
R/W
√
Undefined
FFFFF088H
DMA source address register 1L
DSA1L
R/W
√
Undefined
FFFFF08AH
DMA source address register 1H
DSA1H
R/W
√
Undefined
FFFFF08CH
DMA destination address register 1L
DDA1L
R/W
√
Undefined
FFFFF08EH
DMA destination address register 1H
DDA1H
R/W
√
Undefined
FFFFF090H
DMA source address register 2L
DSA2L
R/W
√
Undefined
FFFFF092H
DMA source address register 2H
DSA2H
R/W
√
Undefined
FFFFF094H
DMA destination address register 2L
DDA2L
R/W
√
Undefined
FFFFF096H
DMA destination address register 2H
DDA2H
R/W
√
Undefined
FFFFF098H
DMA source address register 3L
DSA3L
R/W
√
Undefined
FFFFF09AH
DMA source address register 3H
DSA3H
R/W
√
Undefined
FFFFF09CH
DMA destination address register 3L
DDA3L
R/W
√
Undefined
Содержание PD703114
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