4-110
Registers
Registers: 0xC0–0xC3
Phase Mismatch Jump Address One (PMJAD1)
Read/Write
PMJAD1
Phase Mismatch Jump Address One
[31:0]
This register contains the 32-bit address that is jumped
to upon a phase mismatch. Depending upon the state of
the PMJCTL bit, this address is either used during an
outbound (Data-Out, Command, Message-Out) phase
mismatch (PMJCTL = 0) or when the WSR bit is cleared
(PMJCTL = 1). This register is loaded with the address of
a SCRIPTS routine that updates the memory data
structures of the BMOV that was executing when the
phase mismatch occurred.
Registers: 0xC4–0xC7
Phase Mismatch Jump Address Two (PMJAD2)
Read/Write
PMJAD2
Phase Mismatch Jump Address Two
[31:0]
This register contains the 32-bit address that is jumped
to upon a phase mismatch. Depending upon the state of
the PMJCTL bit, this address is either used during an
inbound (Data-In, Status, Message-In) phase mismatch
(PMJCTL = 0) or when the WSR bit is set (PMJCTL = 1).
This register is loaded with the address of a SCRIPTS
routine that updates the memory data structures of the
BMOV that was executing when the phase mismatch
occurred.
31
0
PMJAD1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
31
0
PMJAD2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Содержание LSI53C1000
Страница 6: ...vi Preface...
Страница 16: ...xvi Contents...
Страница 28: ...1 12 Introduction...
Страница 234: ...4 124 Registers...
Страница 314: ...6 40 Specifications This page intentionally left blank...
Страница 318: ...6 44 Specifications This page intentionally left blank...
Страница 344: ...6 70 Specifications This page intentionally left blank...
Страница 350: ...6 76 Specifications Figure 6 42 LSI53C1000 329 Ball Grid Array Bottom view...
Страница 352: ...6 78 Specifications...
Страница 360: ...A 8 Register Summary...
Страница 376: ...IX 12 Index...