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5) Data Toggle Synchronization
The data toggle PIDs, DATA0 and DATA1, are the final check to ensure the device received a
valid ACK handshake. The data packet receiver is responsible for maintaining data toggle bit
synchronization. Therefore, the HC is required to correct the IN data toggle synchronization
only, while the device corrects OUT data synchronization.
The data toggle state of any data packet is provided by the List Processor from the Endpoint
and Transfer Descriptors. On an outgoing data packet, when an ACK is received the List
Processor updates the data toggle state. For an incoming data packet, the SIE compares the PID
with the data toggle state from the List Processor. If they match, the data is accepted, an ACK
is returned, and the List Processor updates the data toggle state. If they do not match, the data is
rejected and an ACK is returned (assuming no other errors), but the List Processor does not
update the data toggle.
Isochronous transfers do not perform a data toggle state check and accept any Data0/1 PID.
6) False EOP
If an EOP is detected and the data stream resulted in a CRC error at the last full byte of data,
the EOP is labeled a false EOP. An EOP is also considered false if it failed to reach the
minimum packet size (through 2 CRC bytes for data packets or the PID for handshake packets):
When a false EOP is detected, the packet connectivity remains until another EOP is detected. If
after a false EOP no transitions occur for 16 bit times and the bus is in the idle state, the
transaction is terminated and the next transaction may begin after another 2 bit times. Note that
this is similar to a packet time-out after a packet error.
7) Packet Error
If an error is detected while receiving a packet, the transaction is retired with errors. When a bit
stuff violation, PID check failure or undefined PID, or a CRC error is detected, the SIE waits
18 bit times after the EOP to allow the transaction to time-out at the device before another
transaction is initiated.
An invalid PID is a PID, which is undefined by USB or is inappropriate within the predefined
protocol of transaction PID packet sequences. A packet with an invalid PID is ignored.
8) Internal Buffer Errors
For general TDs the maximum packet size cannot exceed the internal 64 byte buffer. This
guarantees an uninterrupted data transfer. For isochronous transfers the maximum packet size
can be up to 1023. This results in the possibility of having an internal over/underrun condition
in the buffer which interrupts the data transfer. On an OUT data packet, if an underrun occurs
the packet is terminated with a 16 bit time J state resulting in a bit stuff violation. For an IN
data packet, an overrun results in discarded data, but does not affect the processing of the bit
stream. The packet is not acknowledge and will be retried, hopefully with better results.
9) Logical Buffer Errors
A logical buffer error occurs on an IN data packet when the expected number of bytes received
does not match the expected number of bytes. If no other error is detected, the packet is
acknowledged and the data accepted. The over or underrun condition is reported to the HCD.
10) Transaction Completion Status
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