Rev. 3.0, 03/01, page 252 of 390
17.3.3
Mouse Control/Status Register (MSCSR)
This mouse control register contains receive data shift register and mouse interface control/status
bits.
Address: H'1000DC10
Bit
15
14
13
12
11
10
9
8
Bit Name
MSCIE
MSCOE
MSDOE
MSCD
MSDD
MSCS
MSDS
MSDP
Initial Value
0
0
0
0
0
0
0
-
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
Bit
7
6
5
4
3
2
1
0
Bit Name
MSD7
MSD6
MSD5
MSD4
MSD3
MSD2
MSD1
MSD0
Initial Value
-
-
-
-
-
-
-
-
R/W
R
R
R
R
R
R
R
R
Bit
Description
Default
15
MSCK Input Enable Bit (MSCIE)
This bit is used to be MSCK pin input enable control signal.
1: MSCK pin input enable.
0: MSCK pin input is disabled. At transferring data (system->mouse), this bit must be
cleared to 0. This bit is also cleared to 0 when 1-byte of data is received from mouse.
0
14
MSCK Output Enable Bit (MSCOE)
This bit is used to be MSCK pin output enable control signal.
1: MSCK pin output enable.
0: MSCK pin output is disabled (signal will go to Hi-Z).
0
13
MSDATA Output Enable Bit (MSDOE)
This bit is used to be MSDATA pin output enable control signal.
1: MSDATA pin output enable.
0: MSDATA pin output is disabled (signal will go to Hi-Z).
0
12
MSCK Driven Bit (MSCD)
1: MSCK signal is driven to high level.
0: MSCK signal is driven to low level.
0
11
MSDATA Driven Bit (MSDD)
1: MSDATA signal is driven to high level.
0: MSDATA signal is driven to low level.
0
Содержание HD64465
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