Rev. 3.0, 03/01, page 387 of 390
(6)
HD64465BP Module Clock & Clock Source Relationship
Signal Name
Description
Clock Source
Microprocessor Reset Interface
RESETPO#
Power-On Reset
AFECK
RESETMO#
Manual Reset
AFECK
AFE Module
AFE_clk
AFE Interface Clock
AFECK
AFE_cmd_clk
AFE Bus Interface Clock
UCK
Serial Codec Module
SCDI_clk
Serial Codec Interfece Clock
AFECK/UCK
(SCDICKS bit in SCONFR)
USB Host Module
USB_clk
USB Host Clock
UCK
USBbus_clk
USB Host Bus Interface Clock
AFECK/CKIO
(USBCKS bit in SCONFR)
IrDA Module
FIR_clk
FIR Clock
UCK
SIR_clk
SIR Clock
UCK
UART Module
UART_PP_cmd_clk
UART Bus Interface Clock
UCK
UART_clk
UART Clock
UCK
Parallel Port Module
UART_PP_cmd_clk
PP Bus Interface Clock
UCK
PP_clk24
PP 24MHz Clock
UCK
PP_clk1p8
PP 1.8MHz Clock
UCK
KBC Module
KBC_clk
KBC Clock
UCK
PCMCIA Module
PCMCIA_pwr_clk
PCMCIA Power Control Clock
UCK
Internal Module Software Reset
RST_clk
Software Reset Clock
UCK
Note : RESETPO# signal is also used as reset signal for internal module.
Содержание HD64465
Страница 25: ...Rev 3 0 03 01 page 6 of 390 ...
Страница 59: ...Rev 3 0 03 01 page 40 of 390 ...
Страница 97: ...Rev 3 0 03 01 page 78 of 390 ...
Страница 147: ...Rev 3 0 03 01 page 128 of 390 ...
Страница 199: ...Rev 3 0 03 01 page 180 of 390 ...
Страница 247: ...Rev 3 0 03 01 page 228 of 390 ...
Страница 385: ...Rev 3 0 03 01 page 366 of 390 ...
Страница 389: ...Rev 3 0 03 01 page 370 of 390 ...
Страница 409: ...Rev 3 0 03 01 page 390 of 390 ...