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26.14 DAC interrupts
This module has no interrupts.
26.15 CMP Trigger Mode
CMP and DAC are configured to CMP Trigger mode when CMP_CR1[TRIGM] is set to
1. In addition, the CMP must be enabled. If the DAC is to be used as a reference to the
CMP, it must also be enabled.
CMP Trigger mode depends on an external timer resource to periodically enable the
CMP and 6-bit DAC in order to generate a triggered compare.
Upon setting TRIGM, the CMP and DAC are placed in a standby state until an external
timer resource trigger is received.
See the chip configuration chapter for details about the external timer resource.
DAC interrupts
KL02 Sub-Family Reference Manual, Rev. 2.1, July 2013
408
Freescale Semiconductor, Inc.
Содержание KKL02Z32CAF4R
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