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E L C P r o g r a m m i n g M a n u a l
F o r m o r e i n f o r m a t i o n v i s i t :
w w w. e a t o n . c o m
M N 0 5 0 0 3 0 0 3 E
3 - 3 3 8
API Mnemonic
Operands
Function
148
D MEMR P
m, D, n
File Memory Read
Bit Devices
Word devices
Program Steps
Type
OP
X Y M S K
H KnX
KnY
KnM KnS T
C
D
E
F
m
*
*
*
D
*
n
*
*
*
MEMR, MEMRP: 7 steps
DMEMR, DMEMRP: 13
steps
ELC ELCB
ELCM
PB PC/PA/PH
PV
PB PH/PA
32
16
P
32
16
P
32
16
P
32
16
P 32 16 P
Operands:
m
: Constant offset for reading from the data file register
D
: Address for storing read data
n
: Quantity of data read from the file register
Description:
1.
Range of m: K0 ~ K1,599 (ELC-PC/PA/PH); K0 ~ K9,999 (ELC-PV)
2.
Range of D: D2000 ~ D4999 (ELC-PC/PA/PH); D2000 ~ D9999 (ELC-PV)
3.
Range of n: For 16-bit instruction K1 ~ K1,600 (ELC-PC/PA/PH), K1 ~ K8,000 (ELC-PV); For
32-bit instruction K1 ~ K800 (ELC-PC/PA/PH), K1 ~ K4,000 (ELC-PV)
4.
ELC-PC/PA/PH allows for reading a maximum of 1,600 16-bit file registers.
5.
ELC-PV allows for reading a maximum of 10,000 16-bit file registers.
6.
m
and
n
of ELC-PC/PA/PH do not support E and F index registers.
7. If
operands
m
,
D
and
n
are out of range, an operand error will occurr. M1067, M1068= ON and
error code 0E1A will be recorded in D1067.
8.
Flag: M1101, please refer the Notes below in API 149.
Program Example 1:
1.
16-bit instruction MEMR reads 100 16-bit words of data from the 10th address of the file
register and stores the read data in the data register starting with D2000.
2.
When X0= ON, the instruction is executed. When X0 goes to OFF, the instruction is not
executed.
X0
MEMR
K10
D2000
K100
Program Example 2:
1.
32-bit instruction DMEMR reads 100 32-bit data words from the 20th address of the file
register and store the read data in the data register starting with D3000.
2.
When X0= ON, the instruction is executed. When X0 goes to OFF, the instruction is not
executed.
X0
DMEMR
K20
D3000
K100
Содержание ELC-PB
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