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3 . I n s t r u c t i o n S e t
M N050 03003E F or mo re infor ma tio n vi sit:
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M1000
DCNT
C251
K1000
FEND
DHSCS
K100
C251
I010
M1000
Y1
IRET
END
I010
6.
ELC-PC/PA/PH, ELCM-PH/PA models, M1059 is the high-speed counter interrupt disable
flag
7.
ELC-PV models, M1289 ~ M1294 are the disable flags for high speed counter interrupts for
I010 ~ I060, i.e. when M1294 = On, I060 interrupt will be disabled per the table below.
Interruption pointer I
No.
Interrupt disable flag
Interruption pointer I
No.
Interrupt disable flag
I010 M1289 I040 M1292
I020 M1290 I050 M1293
I030 M1291 I060 M1294
Notes for using the DHSCS Instruction with ELCM-PH/PA controllers:
1. If
D
is specified as Y0~Y3, when the instruction is executed and the count value equals
S
1,
the compare result will immediately energize Y0~Y3. All other outputs will be updated
normally. Also, M and S devices, not affected by the program scan time, will be
immediately updated.
2. Operand
D
can use the following interrupts:
I0
□
0,
□
=1~8
3.
High speed counters include software high speed counters and hardware high speed
counters. In addtiion, there are also two types of comparators including software
comparators and hardware comparators.
4. Software
comparators:
a) There are 6 software comparators available that are associated with high speed counter
interrupts.
b) When programming the DHSCS and DHSCR instructions, the total of Set/Reset
comparisons for both instructions can not be more than 6, otherwise a syntax check error will
occur.
c) Table of software counters and software comparators:
Counter
C232 C233 C234 C235 C236 C237
DHSCS
Hi-speed
interrupt I010 I050 I070 I010 I020 I030
Hi-speed compare Set/Reset
C232~C242 share 6 software comparators
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