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E L C P r o g r a m m i n g M a n u a l
F o r m o r e i nf o r m a t i o n v i sit :
w w w. e a t o n . c o m
MN05003003E
3-206
API Mnemonic
Operands
Function
73
SEGD P
S, D
7-segment Decoder
Bit Devices
Word devices
Program Steps
Type
OP
X Y M S K H KnX
KnY
KnM KnS T
C D E
F
S
*
*
*
*
*
*
*
*
*
*
*
D
*
*
*
*
*
*
*
*
SEGD, SEGDP: 5 steps
ELC ELCB
ELCM
PB PC/PA/PH
PV
PB PH/PA
32 16
P
32 16
P
32 16
P
32 16 P 32 16 P
Operands:
S
: Source address for decoding
D
: Output address after decoding
Description:
A single hexadecimal digit (0 to 9, A to F) occupying the lower 4 bits of source device
S
is decoded
into a data format used to drive a seven segment display. A representation of the hex digit is then
displayed. The decoded data is stored in the lower 8 bits of destination address
D
. The upper 8
bits of the address are not written to.
Program Example:
When X20=ON, the contents of the lower 4 bits (b0~b3) of
D10 will be decoded per the table below, to be displayed on
a 7-segment display. The decoded results will be moved to
Y20~Y27.
X20
SEGD
D10
K2Y20
Decoding Chart of the 7-segment Display Panel
Status of each segment
16 bits
Bit
Combination
Composition
of the 7-SEG
display
B0(a) B1(b) B2(c) B3(d) B4(e) B5(f) B6(g)
0 0000
On
On
On
On
On
On
Off
1 0001
Off
On
On
Off
Off
Off
Off
2 0010
On
On
Off
On
On
Off
On
3 0011
On
On
On
On
Off
Off
On
4 0100
Off
On
On
Off
Off
On
On
5 0101
On
Off
On
On
Off
On
On
6
0110
On Off
On
On
On
On
On
7 0111
On
On
On
Off
Off
Off
Off
8 1000
On
On
On
On
On
On
On
9 1001
On
On
On
On
Off
On
On
A 1010
On
On
On
Off
On
On
On
B
1011
Off Off
On
On
On
On
On
C 1100
On
Off
Off
On
On
On
Off
D 1101
Off
On
On
On
On
Off
On
E 1110
On
Off
Off
On
On
On
On
F 1111
On Off
Off
Off
On
On
On
Содержание ELC-PB
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