Eaton ELC-PB, Руководство по программированию

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3 . I n s t r u c t i o n S e t
M N 0 5 0 0 3 0 0 3 E F or m o r e i nf o r m a t i o n v i s i t : www. e a t o n. c o m
3-437
API Mnemonic Operands Function
185 MCMP P
S
1
, S
2
, n, D
Matrix Compare
Bit Devices Word devices Program Steps
Type
OP
X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * * * * * *
S
2
* * * * * * *
n * * *
D * * * * * * * *
MCMP, MCMPP: 9 steps
ELC ELCB ELCM
PB PC/PA/PH PV PB PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P
Operands:
S
1
: matrix source address 1
S
2
: matrix source address 2
n
: matrix length (K1~K256)
D
: Address containing the pointer to the target address
Description:
1. For each comparison, it will compare each bit of
S
1
with each bit of
S
2,
one at a time and
provide the pointer number for the bit position when two bits are equal in
D
. To find the
address of the next equal comparison and save the address in
D
, a false-to-true transition of
the instruction is needed.
2. Flag M1088. If M1088=1 an equal comparison was found and the pointer value is in
D
. Once a
comparison is found, it will stop comparing immediately and set bit M1091=1. When the
comparison reaches the last bit in the matrix, the matrix search end flag M1089 = ON and the
comparison pointer value is saved in
D
. For next scan period, it will start comparing from the
first bit and set the matrix search start flag M1090=1. If the
D
value exceeds its range, the
pointer error flag M1092 =1.
3. The matrix pointer should be a 16-bit D-register.
4.
S
1
, and
S
2
designate KnX, KnY, KnM and KnS;
D
designates KnY, KnM and KnS
ELC-PC/PA/PH, ELCM-PH/PA can designate n = 4. ELC-PV can designate n=1- 4.
5. Flag: M1088-M1092
Program Example:
When X0 transitions from OFF
→
ON, the matrix search start flag M1090=0 and it will start comparing
to find the first occurrence of two equal bits As long as M1088=0, there is no match.
When the present value of the pointer D20=2, and the instruction is executed 4 times, the following
pointer values will be found. Each execution requires a false-to-true transition of the MCMPP
instruction.
1. D20=5, matrix bit search flag M1091=1, matrix search end flag M1089=0.
2. D20=45, matrix bit search flag M1091=1, matrix search end flag M1089=0.
3. D20=47, matrix bit search flag M1091=0, matrix search end flag M1089=1.
4. D20=1, matrix bit search flag M1091=1, matrix search end flag M1089=0.