23
3
3
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.
7
7
D
D
i
i
g
g
i
i
t
t
a
a
l
l
A
A
c
c
c
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e
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r
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The ADXL345 is a small, thin, ultralow power, 3-axis accelerometer with high resolution
measurement. This digital accelerometer can be accessed through a SPI 3-wire digital interface or
I2C 2-wire digital interface. Main applications include medical instrumentation, industrial
instrumentation, personal electronic aid and hard disk drive protection etc. Some of the key features
of this device are listed below. For more detailed information, please refer to its datasheet which is
available on manufacturer’s website or under the /datasheet folder of the system CD.
Up to 13-bit resolution at +/- 16g
SPI (3- wire) or I2C (2-wire) digital interface
Flexible interrupts modes
Figure 3-13
shows the connections between the ADXL345 and the Cyclone IV E device.
Figure 3-13 Wiring between the ADXL345 and the Cyclone IV E device
Table 3-10 Pin Assignments for Digital Accelerometer
Signal Name
FPGA Pin No.
Description
I/O Standard
I2C_SCLK
PIN_F2
EEPROM clock
3.3V
I2C_SDAT
PIN_F1
EEPROM data
3.3V
G_SENSOR_INT
PIN_M2
G_Sensor Interrupt
3.3V
G_SENSOR_CS_N
PIN_G5
G_Sensor chip select
3.3V
3
3
.
.
8
8
C
C
l
l
o
o
c
c
k
k
C
C
i
i
r
r
c
c
u
u
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y
y
The DE0-Nano board includes a 50 MHz oscillator. The oscillator is connected directly to a
dedicated clock input pin of the Cyclone IV E FPGA. The 50MHz clock input can be used as a
source clock to drive the phase lock loops (PLL) circuit. The clock distribution on the DE0-Nano
board is shown in
Figure 3-14
.
Summary of Contents for De0-Nano
Page 1: ...1 ...
Page 4: ...4 9 3 Revision History 155 9 4 Copyright Statement 155 ...
Page 44: ...44 Figure 6 5 Browse to find the location Figure 6 6 There is no need to test the driver ...
Page 90: ...90 Figure 7 14 Add NIOS II Processor ...
Page 93: ...93 Figure 7 17 Rename the CPU 1 Figure 7 18 Rename the CPU 2 ...
Page 98: ...98 Figure 7 23 Add On Chip Memory ...
Page 100: ...100 Figure 7 25 Update Total memory size ...
Page 102: ...102 Figure 7 28 Update CPU settings ...
Page 104: ...104 Figure 7 30 Add PIO ...
Page 106: ...106 Figure 7 32 PIO 21 Rename pio_0 to pio_led as shown in Figure 7 33 Figure 7 33 Rename PIO ...
Page 113: ...113 Figure 7 43 Input verilog Text Figure 7 44 Open DE0_NANO_SOPC v ...
Page 146: ...146 Figure 8 16 Display Progress and Result Information for the SDRAM Demonstration ...
Page 150: ...150 Figure 9 3 Select Devices Page ...
Page 151: ...151 Figure 9 4 Convert Programming Files Page ...