Terasic De0-Nano, User Manual

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Figure 3-1 Programming a serial configuration device with serial flash loader solution
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JTAG Chain on DE0-Nano Board
The JTAG Chain on the DE0-Nano board is connected to a host computer using an on-board
USB-blaster. The USB-blaster consists of a USB Mini-B connector, a FTDI USB 2.0 Controller,
and an Altera MAX II CPLD.
Figure 3-2 illustrates the JTAG configuration setup.
Figure 3-2 JTAG Chain
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Pushbuttons
The DE0-Nano board contains two pushbuttons shown in Figure 3-3 . Each pushbutton is
debounced using a Schmitt Trigger circuit, as indicated in Figure 3-4 . The two outputs called KEY0,
and KEY1 of the Schmitt Trigger devices are connected directly to the Cyclone IV E FPGA. Each
pushbutton provides a high logic level when it is not pressed, and provides a low logic level when
pressed. Since the pushbuttons are debounced, they are appropriate for using as clock or reset
inputs.