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CHAPTER 3 CPU FUNCTIONS
75
3.4.8 Peripheral I/O registers
(1/5)
Address
Function Register Name
Symbol
R/W
Bit Units for
Manipulation
After Reset
1 bit
8 bits
16 bits
FFFFF000H
Port 0
P0
R/W
{
{
00H
Note
FFFFF002H
Port 1
P1
{
{
FFFFF004H
Port 2
P2
{
{
FFFFF006H
Port 3
P3
{
{
FFFFF008H
Port 4
P4
{
{
FFFFF00AH
Port 5
P5
{
{
FFFFF00CH
Port 6
P6
{
{
FFFFF00EH
Port 7
P7
R
{
{
Undefined
FFFFF010H
Port 8
P8
{
{
FFFFF012H
Port 9
P9
R/W
{
{
00H
Note
FFFFF014H
Port 10
P10
{
{
FFFFF016H
Port 11
P11
{
{
FFFFF018H
Port 12
P12
{
{
FFFFF020H
Port 0 mode register
PM0
{
{
FFH
FFFFF022H
Port 1 mode register
PM1
{
{
3FH
FFFFF024H
Port 2 mode register
PM2
{
{
FFH
FFFFF026H
Port 3 mode register
PM3
{
{
FFFFF028H
Port 4 mode register
PM4
{
{
FFFFF02AH
Port 5 mode register
PM5
{
{
FFFFF02CH
Port 6 mode register
PM6
{
{
3FH
FFFFF032H
Port 9 mode register
PM9
{
{
7FH
FFFFF034H
Port 10 mode register
PM10
{
{
FFH
FFFFF036H
Port 11 mode register
PM11
{
{
1FH
FFFFF038H
Port 12 mode register
PM12
{
{
01H
FFFFF04CH
Memory expansion mode register
MM
{
{
00H
FFFFF058H
Port 12 mode control register
PMC12
{
{
FFFFF060H
Data wait control register
DWC
{
FFFFH
FFFFF062H
Bus cycle control register
BCC
{
AAAAH
FFFFF064H
System control register
SYC
{
{
00H
FFFFF068H
Memory address output mode register
MAM
W
{
FFFFF070H
Power save control register
PSC
R/W
{
{
C0H
FFFFF074H
Processor clock control register
PCC
{
{
03H
FFFFF078H
System status register
SYS
{
{
00H
Note
Resetting initializes registers to input mode and 00H cannot actually be read.
Summary of Contents for V850/SA1 mPD703015
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