
CHAPTER 16 FLASH MEMORY (
µµµµ
PD70F3017 AND 70F3017Y ONLY)
364
16.5.3 RESET pin
When connecting the reset signals of the dedicated flash writer to the RESET pin which is connected to the reset
signal generation circuit on-board, conflict of signals occurs. To avoid the conflict of signals, isolate the connection to
the reset signal generation circuit.
When reset signal is input from the user system during the flash memory programming mode, programming
operation will not be performed correctly. Therefore, do not input signals other than the reset signals from the
dedicated flash writer.
RESET
V850/SA1
Reset signal generation circuit
Output pin
Conflict of signals
In the flash memory programming mode, the
signal the reset signal generation circuit outputs
conflicts with the signal the dedicated flash writer
outputs. Therefore, isolate the signals on the
reset signal generation circuit side.
Dedicated flash writer connection pin
16.5.4 Port pin
When the flash memory programming mode is set, all the port pins except the pins which communicate with the
dedicated flash writer become output high-impedance status. If problems such as disabling output high-impedance
status should occur to the external devices connected to the port, connect them to V
DD
or V
SS
through resistors.
16.5.5 Other signal pins
Connect X1, X2, XT2, and AV
REF
to the same status as that in the normal operation mode.
16.5.6 Power supply
Supply the power supply (V
DD
, V
SS
, AV
DD
, AV
SS
, BV
DD
, BV
SS
) same as that in normal operation mode.
Summary of Contents for V850/SA1 mPD703015
Page 2: ...2 MEMO ...
Page 100: ...100 MEMO ...
Page 144: ...144 MEMO ...
Page 200: ...200 MEMO ...
Page 328: ...328 MEMO ...
Page 356: ...356 MEMO ...
Page 358: ...358 MEMO ...
Page 368: ...368 MEMO ...
Page 374: ...374 MEMO ...
Page 382: ...382 MEMO ...