CHAPTER 5 INTERRUPT/EXCEPTION PROCESSING FUNCTION
109
5.2.5 Edge detection function of NMI pin
This function specifies the valid edge of the non-maskable interrupt (NMI) by the rising edge specification register
(EGP0) and falling edge specification register (EGN0).
Read/write is available in 8- or 1-bit unit.
Figure 5-4. Rising Edge Specification Register (EGP0) Format
After reset: 00H
R/W
Address: FFFFF0C0H
Symbol
7
6
5
4
3
2
1
0
EGP0
EGP07
EGP06
EPG05
EPG04
EPG03
EPG02
EGP01
EGP00
EGP0n
Rising Edge Valid Control
0
No interrupt request signal occurs at the rising edge
1
Interrupt request signal occurs at the rising edge
n = 0 : NMI pin control
n = 1 to 7: INTP0 to INTP6 pins control
Figure 5-5. Falling Edge Specification Register (EGN0) Format
After reset: 00H
R/W
Address: FFFFF0C2H
Symbol
7
6
5
4
3
2
1
0
EGN0
EGN07
EGN06
EGN05
EGN04
EGN03
EGN02
EGN01
EGN00
EGN0n
Falling Edge Valid Control
0
No interrupt request signal occurs at the falling edge
1
Interrupt request signal occurs at the falling edge
n = 0 : NMI pin control
n = 1 to 7: INTP0 to INTP6 pins control
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