NEC 78014Y Series, User Manual

Page: 158 / 547

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CHAPTER 7 CLOCK GENERATOR
158
Figure 7-3. Processor Clock Control Register Format
Symbol <7> <6> <5> <4> 3 2 1 0 Address When Reset R/W
PCC MCC FRC CLS CSS 0 PCC2 PCC1 PCC0 FFFBH 04H R/W Note 1
R/W
CSS PCC2 PCC1 PCC0 CPU Clock (f
CPU
)
selection
0 0 0 0 f
X
0 0 1 f
X
/2
0 1 0 f
X
/2 2
0 1 1 f
X
/2
3
1 0 0 f
X
/2 4
1 0 0 0 f
XT
0 0 1
0 1 0
0 1 1
1 0 0
Other than above Setting prohibited
R
CLS CPU Clock Status
0 Main system clock
1 Subsystem clock
R/W
FRC Subsystem Clock Feedback Resistor Selection
0 On-chip feedback resistor used
1 On-chip feedback resistor not used
R/W
MCC Main System Clock Oscillation Control Note 2
0 Oscillation possible
1 Oscillation stopped
Notes 1. Bit 5 is Read Only.
2. When the CPU is operating on the subsystem clock, MCC should be used to stop the main system clock
oscillation. A STOP instruction should not be used.
Caution Bit 3 must be set to 0.
Remarks 1. f
X
: Main system clock oscillation frequency
2. f
XT
: Subsystem clock oscillation frequency