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CHAPTER 15 SERIAL INTERFACE CHANNEL 0 (
µ
PD78014 Subseries)
309
(9) Transfer start
Serial transfer is started by setting transfer data to the serial I/O shift register 0 (SIO0) when the following two
conditions are satisfied.
• Serial interface channel 0 operation control bit (CSIE0) = 1
• Internal serial clock is stopped or SCK0 is at high level after 8-bit serial transfer.
Cautions
1. If CSIE0 is set to “1” after data write to SIO0, transfer does not start.
2. Because the N-ch open-drain output must be set to high-impedance at the time of data
reception, write FFH to SIO0 in advance. However, when the wake-up function specification
bit (WUP) = 1, the N-ch open-drain output will always be set to high-impedance. Thus, it
is not necessary to write FFH to SIO0 before reception.
3. If data is written to SIO0 when the slave is busy, the data is not lost.
When the busy state is cleared and SB0 (or SB1) input is set to the high level (READY) state,
transfer starts.
Upon termination of 8-bit transfer, serial transfer automatically stops and the interrupt request flag (CSIIF0) is
set.
For pins which are to be used for data input/output, be sure to carry out the following settings before serial transfer
of the 1st byte after RESET input.
<1> Set the P25 and P26 output latches to 1.
<2> Set bit 0 (RELT) of the serial bus interface control register (SBIC) to 1.
<3> Reset the P25 and P26 output latches from 1 to 0.
(10) Distinction method of slave busy state
When device is in the master mode, follow the procedure below to judge whether slave device is in the busy state
or not.
<1> Detect acknowledge signal (ACK) or interrupt request signal generation.
<2> Set the port mode register PM25 (or PM26) of the SB0/P25 (or SB1/P26) pin into the input mode.
<3> Read out the pin state (when the pin level is high, the READY state is set).
After the detection of the READY state, set the port mode register to 0 and return to the output mode.
(11) Cautions on SBI mode
(a) Slave selection/non-selection is detected by match detection of the slave address received after bus release
(RELD = 1).
For this match detection, match interrupt request (INTCSI0) of the address to be generated with WUP = 1
is normally used. Thus, execute selection/non-selection detection by slave address when WUP = 1.
(b) When detecting selection/non-selection without the use of interrupt with WUP = 0, do so by means of
transmission/reception of the command preset by program instead of using the address match detection
method.
Summary of Contents for 78014Y Series
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Page 62: ...www DataSheet4U com CHAPTER 2 OUTLINE PD78014Y Subseries 62 MEMO...
Page 78: ...www DataSheet4U com CHAPTER 3 PIN FUNCTION PD78014 Subseries 78 MEMO...
Page 94: ...www DataSheet4U com CHAPTER 4 PIN FUNCTION PD78014Y Subseries 94 MEMO...
Page 170: ...www DataSheet4U com CHAPTER 7 CLOCK GENERATOR 170 MEMO...
Page 222: ...www DataSheet4U com CHAPTER 9 8 BIT TIMER EVENT COUNTER 222 MEMO...
Page 230: ...www DataSheet4U com CHAPTER 10 WATCH TIMER 230 MEMO...
Page 262: ...www DataSheet4U com CHAPTER 14 A D CONVERTER 262 MEMO...
Page 318: ...www DataSheet4U com CHAPTER 15 SERIAL INTERFACE CHANNEL 0 PD78014 Subseries 318 MEMO...
Page 408: ...www DataSheet4U com CHAPTER 16 SERIAL INTERFACE CHANNEL 0 PD78014Y Subseries 408 MEMO...
Page 446: ...www DataSheet4U com CHAPTER 17 SERIAL INTERFACE CHANNEL 1 446 MEMO...
Page 472: ...www DataSheet4U com CHAPTER 18 INTERRUPT FUNCTIONS AND TEST FUNCTION 472 MEMO...
Page 502: ...www DataSheet4U com CHAPTER 22 PD78P014 78P014Y 502 MEMO...
Page 520: ...www DataSheet4U com CHAPTER 23 INSTRUCTION SET 520 MEMO...