NEC 78014Y Series, User Manual

Page: 161 / 547

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CHAPTER 7 CLOCK GENERATOR
161
Cautions 1. When using a main system clock oscillator and a subsystem clock oscillator, wire the portion
enclosed in the dotted line areas in Figures 7-4 and 7-5 as follows to avoid adverse influence
on the wiring capacitance.
• Keep the wiring length as short as possible.
• Do not cross the wiring over the other signal lines. Do not route the wiring in the vicinity
of lines through which a high fluctuating current flows.
• Always keep the ground point of the capacitor of the oscillator circuit at the same potential
as V
SS
. Do not connect the power source pattern through which a high current flows.
• Do not extract signals from the oscillator.
Take special note of the fact that the subsystem clock oscillator is a circuit with low-level
amplification so that current consumption is maintained at low levels.
Figure 7-6 shows examples of resonator having bad connection.
Figure 7-6. Examples of Resonator with Bad Connection (1/2)
(a) Long wiring of connected circuit (b) Crossed signal lines
Remark When using a subsystem clock, replace X1 and X2 with XT1 and XT2, respectively. Further, insert
resistors in series on the side of XT2.
X2 X1 IC
PORTn
IC X1 X2
(n = 0 to 6)