LeCroy DDA 7 Zi series, Operator'S Manual

Page: 431 / 544

Operator's Manual
WP700Zi-OM-E-RevA
430
Figure 5-45. Bit Error Map for 127-Bit Pattern Containing Random Errors (White Squares).
Figure 5-46. Bit Error Map for 127-Bit Pattern Containing Pattern Dependent Errors.
Vertical Noise Compensation
Introduction
Jitter is a measure of the timing error of data or clock signal transitions. The error is determined by measuring the
time at which the signal crosses a given amplitude level and comparing it to the “expected” transition time. In a
perfect world, this error would be entirely due to timing jitter but, as is often the case, things are not so simple. All
signals contain amplitude noise and this noise can be interpreted as timing jitter in certain circumstances leading
to higher overall jitter values. The noise on the signal under test is, and should be, included in any jitter
measurement, since the data receiver would also interpret this as jitter. Any noise added by the test system
should, however, not be included as this will overestimate the jitter. The SDA includes a feature that removes the
system noise from the instrument, which uses the rms noise of the oscilloscope and probe, if present. This section
explains the theory of operation of the noise compensation.