LGA775 Socket Heatsink Loading
38
Thermal and Mechanical Design Guidelines
Note:
Intel
®
Core™2 Extreme processor QX6800 B3 stepping and QX9770 C0 stepping do
not have an on-die thermal diode. The T
CONTROL
in the MSR is relevant only to the
DTS.
4.2.11
Platform Environmental Control Interface (PECI)
The PECI interface is a proprietary single wire bus between the processor and the
chipset or other health monitoring device. At this time the digital thermal sensor is
the only data being transmitted. For an overview of the PECI interface see PECI
Feature Set Overview. For additional information on the PECI see the processor
datasheet.
The PECI bus is available on pin G5 of the LGA 775 socket. Intel chipsets beginning
with the ICH8 have included PECI host controller. The PECI interface and the
Manageability Engine are key elements to the Intel
®
Quiet System Technology
(Intel
®
QST), see Chapter
6 and the Intel
®
Quiet System Technology (Intel
®
QST)
Configuration and Tuning Manual.
Intel has worked with many vendors that provide fan speed control devices to provide
PECI host controllers. Consult the local representative for your preferred vendor for
their product plans and availability.
§
Summary of Contents for QX68000 Core 2 Extreme
Page 30: ...LGA775 Socket Heatsink Loading 30 Thermal and Mechanical Design Guidelines...
Page 74: ...Heatsink Clip Load Metrology 74 Thermal and Mechanical Design Guidelines...
Page 76: ...Thermal Interface Management 76 Thermal and Mechanical Design Guidelines...
Page 96: ...Case Temperature Reference Metrology 96 Thermal and Mechanical Design Guidelines...
Page 108: ...Legacy Fan Speed Control 108 Thermal and Mechanical Design Guidelines...
Page 112: ...BTX System Thermal Considerations 112 Thermal and Mechanical Design Guidelines...
