474
CHAPTER 21 CAN CONTROLLER
21.4.18
Remote Request Receiving Register (RRTRR)
After a remote frame is stored in the message buffer (x), RRTRx becomes 1 (at the same
time as RCx setting to 1).
■
Register Configuration
Figure 21.4-18 Configuration of the Remote Request Receiving Register (RRTRR)
■
Register Function
●
Conditions for RRTRx = 0
•
Write 0 to RRTRx.
•
After a received data frame is stored in the message buffer (x) (at the same time as RCx setting to 1).
•
Transmission by the message buffer (x) is completed (TCx of the transmission complete register (TCR)
is 1).
Writing 1 to RRTRx is ignored.
1 is read when a Read Modify Write instruction is performed.
Note:
If setting to 1 by completion of the receive operation and clearing to 0 by writing occur at the same
time, the bit is set to 1.
Address
bit15
bit14
bit13
bit12
bit11
bit10
bit9
bit8
RRTRR1(Upper)
CAN1:
00008B
H
RRTR15
RRTR14
RRTR13
RRTR12
RRTR11
RRTR10
RRTR9
RRTR8
Reset value
0 0 0 0 0 0 0 0
B
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Address
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
RRTRR1(Lower)
CAN1:
00008A
H
RRTR7
RRTR6
RRTR5
RRTR4
RRTR3
RRTR2
RRTR1
RRTR0
Reset value
0 0 0 0 0 0 0 0
B
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W : Read/Write
Summary of Contents for F2MCTM-16LX
Page 2: ......
Page 3: ...FUJITSU LIMITED F2MCTM 16LX 16 BIT MICROCONTROLLER MB90360 Series HARDWARE MANUAL ...
Page 4: ......
Page 42: ...26 CHAPTER 1 OVERVIEW ...
Page 70: ...54 CHAPTER 2 CPU ...
Page 134: ...118 CHAPTER 6 CLOCK SUPERVISOR ...
Page 176: ...160 CHAPTER 8 LOW POWER CONSUMPTION MODE ...
Page 194: ...178 CHAPTER 10 I O PORTS ...
Page 252: ...236 CHAPTER 13 16 Bit I O TIMER ...
Page 282: ...266 CHAPTER 14 16 BIT RELOAD TIMER ...
Page 296: ...280 CHAPTER 15 WATCH TIMER ...
Page 386: ...370 CHAPTER 18 8 10 BIT A D CONVERTER ...
Page 426: ...410 CHAPTER 20 LIN UART Figure 20 5 2 ORE Flag Set Timing RDRF ORE Reception data ...
Page 540: ...524 CHAPTER 22 ADDRESS MATCH DETECTION FUNCTION ...
Page 568: ...552 CHAPTER 24 512K BIT FLASH MEMORY ...
Page 633: ...617 APPENDIX B Instructions Table B 9 3 Bit Operation Instruction Map first byte 6CH ...
Page 634: ...618 APPENDIX Table B 9 4 Character String Operation Instruction Map first byte 6EH ...
Page 637: ...621 APPENDIX B Instructions Table B 9 7 ea Instruction 2 first byte 71H ...
Page 638: ...622 APPENDIX Table B 9 8 ea Instruction 3 first byte 72H ...
Page 639: ...623 APPENDIX B Instructions Table B 9 9 ea Instruction 4 first byte 73H ...
Page 640: ...624 APPENDIX Table B 9 10 ea Instruction 5 first byte 74H ...
Page 641: ...625 APPENDIX B Instructions Table B 9 11 ea Instruction 6 first byte 75H ...
Page 642: ...626 APPENDIX Table B 9 12 ea Instruction 7 first byte 76H ...
Page 643: ...627 APPENDIX B Instructions Table B 9 13 ea Instruction 8 first byte 77H ...
Page 644: ...628 APPENDIX Table B 9 14 ea Instruction 9 first byte 78H ...
Page 645: ...629 APPENDIX B Instructions Table B 9 15 MOVEA RWi ea Instruction first byte 79H ...
Page 646: ...630 APPENDIX Table B 9 16 MOV Ri ea Instruction first byte 7AH ...
Page 647: ...631 APPENDIX B Instructions Table B 9 17 MOVW RWi ea Instruction first byte 7BH ...
Page 648: ...632 APPENDIX Table B 9 18 MOV Ri ea Instruction first byte 7CH ...
Page 649: ...633 APPENDIX B Instructions Table B 9 19 MOVW ea Rwi Instruction first byte 7DH ...
Page 650: ...634 APPENDIX Table B 9 20 XCH Ri ea Instruction first byte 7EH ...
Page 651: ...635 APPENDIX B Instructions Table B 9 21 XCHW RWi ea Instruction first byte 7FH ...
Page 664: ...648 APPENDIX ...
Page 665: ...649 INDEX INDEX The index follows on the next page This is listed in alphabetic order ...
Page 682: ......